iCore | iCore
1.0 |
2012.05.02.00:00:21 | Generation Report |
Output Directory | E:/WORK/iCore/LOGIC/ | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Files | E:/WORK/iCore/LOGIC/iCore/synthesis/iCore.v (258983 bytes VERILOG)
E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0.ocp (856 bytes OTHER) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0.sdc (4097 bytes SDC) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0.v (301832 bytes VERILOG_ENCRYPT) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_ic_tag_ram.mif (1881 bytes MIF) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_jtag_debug_module_sysclk.v (7171 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_jtag_debug_module_tck.v (8529 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_jtag_debug_module_wrapper.v (10487 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_mult_cell.v (6317 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_ociram_default_contents.mif (5714 bytes MIF) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_oci_test_bench.v (1510 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_rf_ram_a.mif (600 bytes MIF) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_rf_ram_b.mif (600 bytes MIF) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_nios2_qsys_0_test_bench.v (29404 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_sdram_0.v (24338 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_epcs_flash_controller_0.v (17504 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_epcs_flash_controller_0_boot_rom_synth.hex (5148 bytes HEX) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_sysid_qsys_0.v (1454 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_pio_led.v (2197 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_master_translator.sv (16802 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_slave_translator.sv (16043 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_master_agent.sv (8686 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_slave_agent.sv (19132 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_burst_uncompressor.sv (10373 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_avalon_sc_fifo.v (32228 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_addr_router.sv (6735 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_addr_router_001.sv (7301 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_id_router.sv (6027 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_id_router_001.sv (6039 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_id_router_003.sv (5958 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_traffic_limiter.sv (12802 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_avalon_st_pipeline_base.v (4716 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_burst_adapter.sv (37064 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_reset_controller.v (3595 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_reset_synchronizer.v (3564 bytes VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_reset_controller.sdc (1179 bytes SDC) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_cmd_xbar_demux.sv (4741 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_cmd_xbar_demux_001.sv (6004 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_arbitrator.sv (9460 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_cmd_xbar_mux.sv (10416 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_rsp_xbar_demux.sv (4100 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_rsp_xbar_demux_003.sv (3476 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_rsp_xbar_mux.sv (12035 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_rsp_xbar_mux_001.sv (13655 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/altera_merlin_width_adapter.sv (35859 bytes SYSTEM_VERILOG) E:/WORK/iCore/LOGIC/iCore/synthesis/submodules/iCore_irq_mapper.sv (1682 bytes SYSTEM_VERILOG) |
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Instantiations |
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